What are SSE and AVX? Should we know these? Should we have already known these?
caretcaret
SSE (Streaming SIMD Extensions) and AVX (Advanced Vector Extensions) are the names of the sets of vector instruction extensions to x86 (they are not the names of the instructions themselves). We aren't expected to know these instructions already, but we'll get a chance to play with them in Assignment 1 through the ispc compiler and/or intrinsics.
rbandlam
Practically major difference i feel between SSE and AVX instructions is that SSE is used if each core has 4 SIMD ALU's since they operate on 128 bits and AVX is used if each core has 8 SIMD ALU's since they operate on 256 bits.
TA-lixf
@lament, you will have a chance to play with them (mostly SSE) in assignment 1, and no, we don't expect you to have known them coming into the class.
doodooloo
I am a bit confused about how AVX instructions works for both 4x64 bits and 8x32 bits. I know it works for 4 wide and 8 wide vectors respectively, so does it mean the instructions will work differently depending on how many ALUs? or depending on how many bits the processor is working on? What will happen if we run the AVX instructions on a 64-bits processor with 8 ALUs and a 32-bits processor with 4 ALUs?
kayvonf
At the level that we are thinking about architecture in this class, it would be reasonable to think of there being a piece of hardware that is capable of 8 single-precision operations or 4 double precision operations. If you interested in good ways to implement such a piece of hardware, at some point you might want to take a look at Prof Mutlu's graduate-level computer architecture classes.
What are SSE and AVX? Should we know these? Should we have already known these?
SSE (Streaming SIMD Extensions) and AVX (Advanced Vector Extensions) are the names of the sets of vector instruction extensions to x86 (they are not the names of the instructions themselves). We aren't expected to know these instructions already, but we'll get a chance to play with them in Assignment 1 through the
ispccompiler and/or intrinsics.Practically major difference i feel between SSE and AVX instructions is that SSE is used if each core has 4 SIMD ALU's since they operate on 128 bits and AVX is used if each core has 8 SIMD ALU's since they operate on 256 bits.
@lament, you will have a chance to play with them (mostly SSE) in assignment 1, and no, we don't expect you to have known them coming into the class.
I am a bit confused about how AVX instructions works for both 4x64 bits and 8x32 bits. I know it works for 4 wide and 8 wide vectors respectively, so does it mean the instructions will work differently depending on how many ALUs? or depending on how many bits the processor is working on? What will happen if we run the AVX instructions on a 64-bits processor with 8 ALUs and a 32-bits processor with 4 ALUs?
At the level that we are thinking about architecture in this class, it would be reasonable to think of there being a piece of hardware that is capable of 8 single-precision operations or 4 double precision operations. If you interested in good ways to implement such a piece of hardware, at some point you might want to take a look at Prof Mutlu's graduate-level computer architecture classes.