Read-exclusive transaction is required even if cache line is valid because another processor may have the same cache line at shared state as well. If there is no read-exclusive transaction, they don't know that data have been changed and read inconsistent data next time.

If another processor have modified the data, how can this cache line still be valid for this processor? Isn't there a read-exclusive issued by that processor already?

@crabcake Thanks for pointing out the mistake. I modified the original comment. This read-exclusive transaction should be used to notify other processors having data in shared state of the changes.

MSI protocol is a great abstraction of one of the possible ways making shared cache work. But I am quite curious about the implementation of it. Especially, how are the states stored and maintained in the cache? I don't think this is mentioned in detail in the class. But a previous slide shows that the states are stored as some line state bits in the cache line. This is a quite reasonable way of implementation. Are there any other ways?

One thing to notice is that the states are based on granularity of cache line, not a particular variable address.