Could someone help explain what this sentence mean - If action A is observed by the cache controller, action B is taken. What is action A/B and how it is related to the state?
jmackama
@nba16235: It's a legend for the diagram. For example, if the cache controller is in state S, and observes a PrWr from the local processor, it responds by sending a BusRdX. (Which will invalidate that block for any other caches)
hanzhoul
So when a processor is in M state for a cache, other processors must in I state. Is that right?
kevinle1
I believe that is true, since otherwise cache coherence wouldn't necessarily be maintained.
Could someone help explain what this sentence mean - If action A is observed by the cache controller, action B is taken. What is action A/B and how it is related to the state?
@nba16235: It's a legend for the diagram. For example, if the cache controller is in state S, and observes a PrWr from the local processor, it responds by sending a BusRdX. (Which will invalidate that block for any other caches)
So when a processor is in M state for a cache, other processors must in I state. Is that right?
I believe that is true, since otherwise cache coherence wouldn't necessarily be maintained.