To make sure I understand this, this does not map to slide 4, right? In slide 4, the cores on A have sequential performance P and those on B have sequential performance P/2. It seems that this is more comparable to those on B having sequential performance P/4?
Or is the idea that perf(4) might be 2, so it does map to slide 4 perfectly?
Thanks!
cuiwei
@lamme: no this does map to slide 4. Check the next slide. perf(r) is not a linear function of r, rather it is sort(r). Processing speed of a single core is not necessarily proportional to the processing resources(such as transistors count), as shown during the classes at the beginning of this semester.
To make sure I understand this, this does not map to slide 4, right? In slide 4, the cores on A have sequential performance P and those on B have sequential performance P/2. It seems that this is more comparable to those on B having sequential performance P/4? Or is the idea that perf(4) might be 2, so it does map to slide 4 perfectly? Thanks!
@lamme: no this does map to slide 4. Check the next slide. perf(r) is not a linear function of r, rather it is sort(r). Processing speed of a single core is not necessarily proportional to the processing resources(such as transistors count), as shown during the classes at the beginning of this semester.