Question: on each DRAM, on different banks. Are they storing the same data, or they store different data with an XOR as back-up?
bpr
@Tengjiao, each bank is storing different data, but no XOR. At some granularity, the addresses are interleaving between the different banks so as to increase bandwidth.
Higher-end DRAM may use ECC (error correcting codes) for back-up, but in general there is no redundancy in DRAM storage.
bob_sacamano
Since every memory fetch goes to the LLC, why is it a bad thing to have a 64-bit memory bus? Since LLC is the only hardware unit that directly interacts with the memory, wouldn't it be more efficient to perform data transfers in units of LLC line size? Going by the example on the following slides, the size of the LLC line is 512 bits. Wouldn't it be more efficient to have a 512-bit bus so that a single memory transfer would suffice to load a line into the LLC?
bpr
@bob_sacamano, the more bits, the more wires, and therefore the more power for every cycle on the bus. Wider buses often cannot be clocked as fast as smaller buses.
Question: on each DRAM, on different banks. Are they storing the same data, or they store different data with an XOR as back-up?
@Tengjiao, each bank is storing different data, but no XOR. At some granularity, the addresses are interleaving between the different banks so as to increase bandwidth.
Higher-end DRAM may use ECC (error correcting codes) for back-up, but in general there is no redundancy in DRAM storage.
Since every memory fetch goes to the LLC, why is it a bad thing to have a 64-bit memory bus? Since LLC is the only hardware unit that directly interacts with the memory, wouldn't it be more efficient to perform data transfers in units of LLC line size? Going by the example on the following slides, the size of the LLC line is 512 bits. Wouldn't it be more efficient to have a 512-bit bus so that a single memory transfer would suffice to load a line into the LLC?
@bob_sacamano, the more bits, the more wires, and therefore the more power for every cycle on the bus. Wider buses often cannot be clocked as fast as smaller buses.