How does one go about increasing the number of lanes? I understand that this is primarily done through hardware, but can you just keep adding lanes when you need to, or is there some point where it becomes unfeasible to do that?
bAAn
@aravisha: One limitation is physical space: If this is between cores on a chip, for example, the routing itself will become more expensive in terms of area (http://www.oracle.com/technetwork/systems/opensparc/opensparc-t1-page-1444609.html : in this processor, the crossbar between cores is as big as a core itself). The same problem applies to different processors on a board or between processors and RAM - the board layout gets more complex and you need more layers on the PCB just to route. Then you have other issues like more complex memory management hardware, etc.
LazyKiller
Another method is to increase the person inside a car. For example, if we do carpool of 4 rather than a car with only one person inside, we can increase the throughput by doing nothing. What is the corresponding method in computer area? Because simply increasing packet size seems not help. Can we gain some improvement by changing the protocol to reduce overhead?
bAAn
@LazyKiller: Remember the "data" in this example is the car itself, not the person/people inside the car. I think the analogy should be - cars are data, people are the "meaningfulness" of data (I don't have a better term). So packing more people per car is like packing more bytes per byte, which sounds like data compression to me. Like in a grayscale bitmap, you have each byte representing a pixel, but in a JPEG, each byte probably impacts way more than one pixel.
jmackama
@bAAn, the "multiple people per car" line of thinking might also be using tricks like multiple voltage levels. By having several different voltage levels, you can potentially send multiple bits of data along a single wire, but this is limited by your signal/noise ratio and requires a fair amount of edge complexity to decode.
ferozenaina
@jmackama - I don't think they are multiplexed with voltage levels - Computers typically just use one pair of voltage levels - CMOS is 0 and 3.3V. The circuitry would be too complex.
My guess is the bus/interconnect size would be increased. As bAAn mentioned, physical constraints exist. Each extra bus would also need extra circuitry for transmitting and receiving. The chip designer has to make this trade-off.
How does one go about increasing the number of lanes? I understand that this is primarily done through hardware, but can you just keep adding lanes when you need to, or is there some point where it becomes unfeasible to do that?
@aravisha: One limitation is physical space: If this is between cores on a chip, for example, the routing itself will become more expensive in terms of area (http://www.oracle.com/technetwork/systems/opensparc/opensparc-t1-page-1444609.html : in this processor, the crossbar between cores is as big as a core itself). The same problem applies to different processors on a board or between processors and RAM - the board layout gets more complex and you need more layers on the PCB just to route. Then you have other issues like more complex memory management hardware, etc.
Another method is to increase the person inside a car. For example, if we do carpool of 4 rather than a car with only one person inside, we can increase the throughput by doing nothing. What is the corresponding method in computer area? Because simply increasing packet size seems not help. Can we gain some improvement by changing the protocol to reduce overhead?
@LazyKiller: Remember the "data" in this example is the car itself, not the person/people inside the car. I think the analogy should be - cars are data, people are the "meaningfulness" of data (I don't have a better term). So packing more people per car is like packing more bytes per byte, which sounds like data compression to me. Like in a grayscale bitmap, you have each byte representing a pixel, but in a JPEG, each byte probably impacts way more than one pixel.
@bAAn, the "multiple people per car" line of thinking might also be using tricks like multiple voltage levels. By having several different voltage levels, you can potentially send multiple bits of data along a single wire, but this is limited by your signal/noise ratio and requires a fair amount of edge complexity to decode.
@jmackama - I don't think they are multiplexed with voltage levels - Computers typically just use one pair of voltage levels - CMOS is 0 and 3.3V. The circuitry would be too complex.
My guess is the bus/interconnect size would be increased. As bAAn mentioned, physical constraints exist. Each extra bus would also need extra circuitry for transmitting and receiving. The chip designer has to make this trade-off.