What does the last point mean? Remote operation can be performed on remote memory?
ferozenaina
Lets say we have 2 processors and 2 memories associated with each processor due to the way the system was architected. Processor 0 can access the memory associated with processor 1 without requiring processor 1 to do anything or intervene.
(I think of this as being similar to DMA where the processor doesn't have to do any work to transfer data to IO [the other processor] devices)
tcm
This slide is talking about a shared-address space machine, where directory-based cache coherence is used to communicate between nodes. In that case, all of the requests and responses are handled entirely by hardware. This is not about software message passing.
What does the last point mean? Remote operation can be performed on remote memory?
Lets say we have 2 processors and 2 memories associated with each processor due to the way the system was architected. Processor 0 can access the memory associated with processor 1 without requiring processor 1 to do anything or intervene.
(I think of this as being similar to DMA where the processor doesn't have to do any work to transfer data to IO [the other processor] devices)
This slide is talking about a shared-address space machine, where directory-based cache coherence is used to communicate between nodes. In that case, all of the requests and responses are handled entirely by hardware. This is not about software message passing.