When Corei7 supports 2 threads (hyper-threading), is this the same as superscalar? My understanding - no, superscalar is just pipelining. I know that in superscalar, multiple instructions are executed in 1 clock cycle.
Is hyperthreading the same as having 2 Execution Contexts? Where does HT fall in the above table?
neonachronism
Superscaler its not the same as pipelining - a superscaler processor can issue multiple instructions per cycle, not just have multiple "in flight" at different stages of processing. However, the instructions are nondependent instructions from the same thread. In hyperthreading (aka Simultaneous Multithreading [SMT]), you can issue multiple instructions from different threads. This involves replicating components such as the register file and instruction unit.
ant
I remember from my Computer Architecture course that there are algorithms for out-of-order execution that allow us to use multiple available execution units (like multiple adders) simultaneously (like https://en.wikipedia.org/wiki/Tomasulo_algorithm). Is this one way of implementing a superscalar architecture?
When Corei7 supports 2 threads (hyper-threading), is this the same as superscalar? My understanding - no, superscalar is just pipelining. I know that in superscalar, multiple instructions are executed in 1 clock cycle.
Is hyperthreading the same as having 2 Execution Contexts? Where does HT fall in the above table?
Superscaler its not the same as pipelining - a superscaler processor can issue multiple instructions per cycle, not just have multiple "in flight" at different stages of processing. However, the instructions are nondependent instructions from the same thread. In hyperthreading (aka Simultaneous Multithreading [SMT]), you can issue multiple instructions from different threads. This involves replicating components such as the register file and instruction unit.
I remember from my Computer Architecture course that there are algorithms for out-of-order execution that allow us to use multiple available execution units (like multiple adders) simultaneously (like https://en.wikipedia.org/wiki/Tomasulo_algorithm). Is this one way of implementing a superscalar architecture?