Increasing the line size, even though the simplest approach, is not the best idea. This will increase the probability of collisions and thus misses.
makingthingsfast
How do we determine the balance between M and P measures for directory representations? When talking about improving schemes of these directories, we talked about improving one of these terms, which led to other negative side effects. Just like the tradeoff between space and time, is there no hard formula for which variable is best to optimize on?
grarawr
Representing multiple processors in one bit reduces P term and snooping protocol can be used within one group but it could create traffic because of the additional hierarchy.
ZhuansunXt
Another potential problem of increasing cache line size is that, it may cause more severe false sharing situations for application code. In other words, false sharing is more likely to happen.
Lotusword
Full-bit vector scheme is also called flat directory scheme, which could be divided into two classes: memory-based schemes and cache-based schemes.
Increasing the line size, even though the simplest approach, is not the best idea. This will increase the probability of collisions and thus misses.
How do we determine the balance between M and P measures for directory representations? When talking about improving schemes of these directories, we talked about improving one of these terms, which led to other negative side effects. Just like the tradeoff between space and time, is there no hard formula for which variable is best to optimize on?
Representing multiple processors in one bit reduces P term and snooping protocol can be used within one group but it could create traffic because of the additional hierarchy.
Another potential problem of increasing cache line size is that, it may cause more severe false sharing situations for application code. In other words, false sharing is more likely to happen.
Full-bit vector scheme is also called flat directory scheme, which could be divided into two classes: memory-based schemes and cache-based schemes.