This slide mentions that inclusion is not maintained automatically and the next slide mentions that maintaining inclusion during invalidations. However, it seems that inclusion is a property that should be maintained in a situation that is described above. I was wondering how this would be implemented and ensured.
fleventyfive
@chuanxuean: for implementing the inclusion property, one important aspect is that the eviction/dropping of cache lines in a particular cache cannot happen independent of the other caches. In other words, any decision taken by any cache must happen by either informing the other caches, or by gathering information (like least recently used cache line etc.) from the other caches. By other caches, I mean the other caches in the same stack, and not across different caches on different cores. For instance, in the above example, before the L1 cache evicts one of its lines, it should inform the L2 cache about its decision to evict a certain cache line. Also, if L2 cache decides to drop a line due to a BusRdX, then it will have inform L1 cache to also drop its corresponding line, and also possibly flush it in the process of doing so.
This slide mentions that inclusion is not maintained automatically and the next slide mentions that maintaining inclusion during invalidations. However, it seems that inclusion is a property that should be maintained in a situation that is described above. I was wondering how this would be implemented and ensured.
@chuanxuean: for implementing the inclusion property, one important aspect is that the eviction/dropping of cache lines in a particular cache cannot happen independent of the other caches. In other words, any decision taken by any cache must happen by either informing the other caches, or by gathering information (like least recently used cache line etc.) from the other caches. By other caches, I mean the other caches in the same stack, and not across different caches on different cores. For instance, in the above example, before the L1 cache evicts one of its lines, it should inform the L2 cache about its decision to evict a certain cache line. Also, if L2 cache decides to drop a line due to a BusRdX, then it will have inform L1 cache to also drop its corresponding line, and also possibly flush it in the process of doing so.