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whitelez

For The broadcasting, will the access from other cache through interconnect faster than access from memory? If that is true, why not broadcast the modified value every time after store operation is executed?

rsvaidya

As discussed in class: Cache coherence problem can also occur in uniprocessor environment when cache contains the latest updated value and then that value is to be accessed by other I/O devices. This problem is generally solved by the cache flushing to memory before each I/O operation. But the problem discussed in multiprocessor environment cannot be solved by flushing each time because then the whole purpose of cache will be lost.

ykt

@whitelez Broadcasting the value each time you execute a store operation would cause a lot of traffic on the interconnect which we don't want.

kapalani

Even if the cache was write-through we still need a coherence protocol because write through only ensures subsequent accesses to memory after a store will always get the most up to date value. If that data was cached in another processor before the store, without a cache coherence protocol, the processor will still read a stale value even though memory contains the most up to date value