Parallel Computer Architecture and Programming (CMU 15-418/618)

This page contains practice exercises to help you understand material in the course. Reference material and lecture videos are available on the Lectures page.

Self-Check Exercises

Exercise 1: A Task Queue + The Professor with the Most ALUs (Sometimes) Wins
Concepts tested: multi-core architecture, hardware multi-threading

Exercise 2: A Yinzer Processor Pipeline + Data Parallel Histograms + SIMD Tree Search
Concepts tested: pipelining, data-parallel programming, SIMD execution

Exercise 3: Pixel Processing in Parallel + Particle Processing
Concepts tested: optimizing parallel code, workload imbalance, synchronization, false sharing

Exam 1 Practice Exercises
Concepts tested: everything up to Exam 1

Exercise 4: Miscellaneous Problems + Concurrent Hashtables
Concepts tested: scheduling/elasticity, multi-threading, fine-grained locking

Exercise 5: Transactions on Trees + Interconnects
Concepts tested: transactional memory, interconnect design, routing, fine-grained locking

Exercise 6: Seeing How the Studying is Going + Controlling DRAM
Concepts tested: scheduling Spark programs, how DRAM works

Programming Assignments

Assignment 1: Analyzing Parallel Program Performance on an Eight-Core CPU

Assignment 2: A Simple CUDA Renderer

Assignment 3: Processing Big Graphs on the Xeon Phi

Assignment 4: A Simple, Parallel Webserver