Previous | Next --- Slide 8 of 52
Back to Lecture Thumbnails
sandeep6189

Note the difference: The addresses here are different contrary to the case in cache coherence.

cwchang

What does it mean by "all the memory operations were executed in some sequential order"? When putting all the memory operation into one timeline, wouldn't they readily be "some sequential order"?

jocelynh

A point I'm kind of confused on--would sequential consistency with caches imply cache coherence? I ask because if we took only the parts of the timeline that had to do with address X, that looks a lot like the cache coherence timeline guarantee.

paracon

@jocelynh I found this link by @Master on a previous slide very useful. I think this answers your question.

@cwchang, "all the memory operations were executed in some sequential order" means assuming the operations were performed one after the other, and not in parallel by multiple processors. A systems is sequentially consistent if the output by the parallel system is same as the output by a sequential schedule (where the operations of one processor is in program order, and the ones by multiple processors can be interleaved)

boba

@jocelynh I think sequential consistency does imply cache coherence. If we have timeline of all memory operations (definition of sequential consistency) then we can put the values of a particular address on a timeline (definition of coherence).