Any data you want to use this on would have to be aligned to 2kb addresses, unless the memory chip has additional capabilities (for instance, AND and OR could allow it to combine parts of two rows, but would probably also require a couple row-buffer-sized registers on the chip).
crow
to solve the alignment issue, in the case of large memcpys, we could also use dram to do most of the work, and then involve the processor in the usual way to take case of both ends of area to be copied
bochet
notice the data still needs to be transferred to row buffer first before copy happened
mak
Does standard C library's memcpy use this? Or does it still involve CPU?
Suppose, DMA needs to transfer data from src to dst, both of which lie on the same chip.
Does data follow the same path as mentioned above, even in case of DMA?
Any data you want to use this on would have to be aligned to 2kb addresses, unless the memory chip has additional capabilities (for instance, AND and OR could allow it to combine parts of two rows, but would probably also require a couple row-buffer-sized registers on the chip).
to solve the alignment issue, in the case of large memcpys, we could also use dram to do most of the work, and then involve the processor in the usual way to take case of both ends of area to be copied
notice the data still needs to be transferred to row buffer first before copy happened
Does standard C library's memcpy use this? Or does it still involve CPU?
Suppose, DMA needs to transfer data from src to dst, both of which lie on the same chip. Does data follow the same path as mentioned above, even in case of DMA?