Because coherence applies to cache lines, variables that are within the same cache line will necessarily demonstrate sequentially consistent read/write behavior between each other.

This comment was marked helpful 0 times.

@zwei: CAREFUL! Coherence and consistency are COMPLETELY different concepts. Also, most systems I can think of do not provide sequentially consistent memory semantics.

This comment was marked helpful 0 times.

To clarify the difference between memory coherence and memory consistence, an example is discussed here.

The code on Processor 1:

A = 1;
flag = 1;

The code on Processor 2:

while (flag == 1);
print A;

The program on P2 cannot continue to execute until flag has been set to 1 by P1 and propagated to P2.

If only memory coherence is realized, the printed value of A can be either 0 or 1. Because memory coherence doesn't enforce the latest update of different locations, the value of A cannot be determined exactly.

But when memory consistency is guaranteed, the printed value is definitely 1. Because A=1 is executed over before flag is set to 1, the latest value of A should be loaded by P2.

This comment was marked helpful 4 times.

Question: If sequential consistency is provided, is memory coherence guaranteed?

This comment was marked helpful 0 times.

Question: Compared with slide 11 of the coherence lecture, can I say coherence is a sequential consistency of operations on a single value instead of operations on all values?

This comment was marked helpful 0 times.

@TeBoring: in my understanding, the concept of consistency and coherence are not dependent on each other. Consistency addresses WHEN does other processors see a memory update, while coherence shows HOW memory updates are propagated. Here is a more detailed slide.

This comment was marked helpful 0 times.

memory consistency is prerequisite of lock-free data structure. Re-ordering of load and store can happen. Memory fences will be required to ensure correct ordering.

This comment was marked helpful 0 times.