This slide and the next one may imply that larger cache enables more threads and enables 'high latency hiding ability'. I think there is some limit for cache size in enhancing this latency hiding ability. Whenever the number of threads is large enough, so that whenever the last thread is to stall for memory retrieval and the core switches back to the 1st thread, and the 1st thread will always get all data (which it requested from memory in previous round) ready to use at its allocation of cache, in such case larger cache and more thread cannot do better for hiding latency.
kayvonf
@hulk: A wrote a comment on the next slide that might be helpful.
This slide and the next one may imply that larger cache enables more threads and enables 'high latency hiding ability'. I think there is some limit for cache size in enhancing this latency hiding ability. Whenever the number of threads is large enough, so that whenever the last thread is to stall for memory retrieval and the core switches back to the 1st thread, and the 1st thread will always get all data (which it requested from memory in previous round) ready to use at its allocation of cache, in such case larger cache and more thread cannot do better for hiding latency.
@hulk: A wrote a comment on the next slide that might be helpful.