I understand what a ring topology looks like, but why is it necessarily better for directory-based cache coherence than a bus topology?
I think that since we're using a ring interconnect, we don't have to send the message to every cache. Rather, we just send the messages to the specific cache that has the directory page in question, allowing us to follow the linked list of directory entries without having to spam all the caches. I'm a little fuzzy on what a ring interconnect is, but I think that's the general idea.
Yeah that sounds right. Also, with a regular bus, only one request can be on the lie at a time, meaning it scales poorly with more processors. who might want to communicate. This kind of set-up allows multiple processors to send requests simultaneously to whoever they need to talk to.
Correct. On a bus interconnect, broadcast is free. (Since all clients see all messages on the bus -- that's the definition of a bus). However when there's a more complex interconnect topology supporting point-to-point messages between nodes, broadcast can be quite expensive (e.g, send messages to all nodes). Therefore, directory based protocols improve performance by only exchanging messages between the nodes that need to know about the memory operation. As you are pointing out, a ring is one such interconnect topology.
In case anyone tries to lookup "ring interconnect" on Google, look up "ring network" or "ring topology" instead.
From looking at the picture of a ring interconnect it doesn't seem like it would let you send a message to only one other node unless it was your neighbor. Is the advantage just that you get to pick whether it's shorter to send the message clockwise or counterclockwise?
Also, I found Intel QuickPath Interconnect which allows point to point messages: http://en.wikipedia.org/wiki/Intel_QuickPath_Interconnect
@russt17. I'll defer a detailed answer on this until the interconnects lecture.
The ring interconnect illustrated on this slide is the interconnection network connecting the processor L2 caches on a single chip. Your observations about a ring are absolutely correct: not every node on the interconnect is directly connected to every other one, and that a message could be routed along the ring to a destination node in either direction.
QuickPath, which you described, is Intel's interconnect technology for chip-to-chip communication, for example between sockets on a multi-socket motherboard. AMD's equivalent is called Hyper-Transport.