It seems like when the tag is modified, we have to keep both copies in sync according to this slide. Then how does cache duplicate tags help? It seems like it does not help when the access is updating. However, if the access is just reading, why cannot the two controllers access the one-tag version at the same time? Is it due to hardware issues that limit the simultaneous reading?
kayvonf
@BigFish. Yes, it would require a dual-ported SRAM (option 2).
Multi-ported tag memory here means multiple controllers (processor-side, snoop) should be able to access cache line simultaneously right? Rather than waiting for one controller to complete reading before another controller gets access.
It seems like when the tag is modified, we have to keep both copies in sync according to this slide. Then how does cache duplicate tags help? It seems like it does not help when the access is updating. However, if the access is just reading, why cannot the two controllers access the one-tag version at the same time? Is it due to hardware issues that limit the simultaneous reading?
@BigFish. Yes, it would require a dual-ported SRAM (option 2).
For hardware wonks: https://inst.eecs.berkeley.edu/~cs250/fa10/lectures/lec08.pdf
Multi-ported tag memory here means multiple controllers (processor-side, snoop) should be able to access cache line simultaneously right? Rather than waiting for one controller to complete reading before another controller gets access.