I want to see someone explain why deadlock can occur in this example.
afzhang
Deadlock can occur in this example if P1 needs cache line A to do its work (so it can't let go of cache line B), but the processor that made the BusRd for B request needs cache line A to do its work. Thus, both processors are stuck waiting on each other's cache lines and unable to let go of their own and make any progress.
aznshodan
@afzhang, I don't understand why the processor can't let go of cache line B. It seems like P1 simply holds the modified copy of cache line B. Also I thought a processor must issue BusRdx or BusRd before it can either write or read a cache line. According to your reasoning, it seems like the processor modified B without issuing BusRdx or BusRd before.
I think there is deadlock b/c we are assuming that a processor can't issue a request and service incoming requests at the same time.
yuel1
I agree with @aznshodan . I believe the main cause of the deadlock is that P1 needs the bus to issue an BusRdX, but the bus is waiting for P1 to respond to the BusRd, but P1 is waiting for the bus to become available to issue it's BusRdX...
gryffolyon
@yuel1, yes that would be the explanation to the deadlock
Sherry
@yuel1 I think P1 here just need to 'flush' instead of issue an BusRdX.
cgjdemo
I think this situation is a typically hold-and-wait deadlock. P1 is holding one resource(cache line B) and requesting another resource(cache line A) which is held by another processor. Any incoming requests for cache line B while P1 is waiting for its request to be granted will lead to deadlock since P1 cannot serve the incoming requests while waiting. That's why this slide says p1 must be able to service incoming transactions while waiting to issue requests to avoid deadlock.
chenliu
@cgjdemo I think it makes more sense to say that the critical resource P1 is requesting and P2 holds is the bus, instead of line A. Part of the reason for the deadlock is that the bus is atomic. P1 doesn't have to request line A for the deadlock to occur; as long as it is requesting for bus access and the bus is atomic, it will be a deadlock in this scenario.
I want to see someone explain why deadlock can occur in this example.
Deadlock can occur in this example if P1 needs cache line A to do its work (so it can't let go of cache line B), but the processor that made the BusRd for B request needs cache line A to do its work. Thus, both processors are stuck waiting on each other's cache lines and unable to let go of their own and make any progress.
@afzhang, I don't understand why the processor can't let go of cache line B. It seems like P1 simply holds the modified copy of cache line B. Also I thought a processor must issue BusRdx or BusRd before it can either write or read a cache line. According to your reasoning, it seems like the processor modified B without issuing BusRdx or BusRd before.
I think there is deadlock b/c we are assuming that a processor can't issue a request and service incoming requests at the same time.
I agree with @aznshodan . I believe the main cause of the deadlock is that P1 needs the bus to issue an BusRdX, but the bus is waiting for P1 to respond to the BusRd, but P1 is waiting for the bus to become available to issue it's BusRdX...
@yuel1, yes that would be the explanation to the deadlock
@yuel1 I think P1 here just need to 'flush' instead of issue an BusRdX.
I think this situation is a typically hold-and-wait deadlock. P1 is holding one resource(cache line B) and requesting another resource(cache line A) which is held by another processor. Any incoming requests for cache line B while P1 is waiting for its request to be granted will lead to deadlock since P1 cannot serve the incoming requests while waiting. That's why this slide says p1 must be able to service incoming transactions while waiting to issue requests to avoid deadlock.
@cgjdemo I think it makes more sense to say that the critical resource P1 is requesting and P2 holds is the bus, instead of line A. Part of the reason for the deadlock is that the bus is atomic. P1 doesn't have to request line A for the deadlock to occur; as long as it is requesting for bus access and the bus is atomic, it will be a deadlock in this scenario.