How is this eDRAM different from the memory hierarchy we know?
hofstee
@zvonryan Generally we think of the memory hierarchy as
Core
Register file
Caches
L1
L2
L3
Memory
Storage
So now we just change memory to be
Memory
eDRAM
DDR
Of course this depends on how it's used. If it's used like an LLC this is fairly accurate. If you're using it as high bandwidth scratchpad I guess it would be more like a fork in the hierarchy next to DDR rather than above it.
rmanne
@hofstee if this is the case, even if a cache hit now is even less costly and is more likely, a cache miss would be even more costly right? Instead of just 3 layers of caching, now there are 4.
How is this eDRAM different from the memory hierarchy we know?
@zvonryan Generally we think of the memory hierarchy as
So now we just change memory to be
Of course this depends on how it's used. If it's used like an LLC this is fairly accurate. If you're using it as high bandwidth scratchpad I guess it would be more like a fork in the hierarchy next to DDR rather than above it.
@hofstee if this is the case, even if a cache hit now is even less costly and is more likely, a cache miss would be even more costly right? Instead of just 3 layers of caching, now there are 4.
@rmanne yes I think that would be the case.