Previous | Next --- Slide 79 of 87
Back to Lecture Thumbnails
Tiresias

Forgive me, my 213 is a bit rusty. It looks like each core has its own L1 and L2 Caches (with no sharing between them), and the L3 cache can be accessed by any the cores. Is that right?

ggm8

@Tiresias I think you are correct.