To handle snooping cache-coherence schemes, caches have to be more sophisticated. While on a single cache setup to maintain coherence the cache only has to listen to commands from the processor, in this context the cache controller has to be able to respond to demands from the processor simultaneously with demands from other cache controllers. As is standard in a lot of CS to allow for more complicated designs the hardware has to be more sophisticated to handle them.
paracon
Later in the class we saw that we can achieve this by either replicating only cache tag bits, or the cache line.
To handle snooping cache-coherence schemes, caches have to be more sophisticated. While on a single cache setup to maintain coherence the cache only has to listen to commands from the processor, in this context the cache controller has to be able to respond to demands from the processor simultaneously with demands from other cache controllers. As is standard in a lot of CS to allow for more complicated designs the hardware has to be more sophisticated to handle them.
Later in the class we saw that we can achieve this by either replicating only cache tag bits, or the cache line.