Before the processor accesses C, the last access to L1 is A, and to L2 is B. Thus, since both are using LRU policy, they will choose to evict B and A respectively and bring C up to the cache, meaning that inclusion doesn't hold anymore since L1 (A, C) is not a subset of L2 (C, B).
Before the processor accesses C, the last access to L1 is A, and to L2 is B. Thus, since both are using LRU policy, they will choose to evict B and A respectively and bring C up to the cache, meaning that inclusion doesn't hold anymore since L1 (A, C) is not a subset of L2 (C, B).