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A bit explanation here:

A cache hit on this processor may be stalled due to some other instructions due to the cache is busy with snooping (even with another cache line!).

eosofsky

I'm a bit confused about why there is contention here. The term "tag lookup" sounds like the tag is not being modified and so more than one reader should be able to access it. Is this because the bus is atomic and only one command/response can occur at a time?

blah329

@eosofsky I believe that there is contention here because of the way that the tag memory is constructed. As mentioned in the next slide, a possible solution to this is multi-ported memory, which implies that that is not being done in this slide. Since this is a single-ported memory, then only one memory access can be made to it, so there cannot be multiple readers, and thus, there is contention for it.

srb

https://www.youtube.com/watch?v=DI3yXg-sX5c

shpeefps

I cannot quite understand what the first line is saying: "If bus receives priority: During bus transaction, processor is locked out from its own cache." Can someone explain?