Previous | Next --- Slide 19 of 44
Back to Lecture Thumbnails
MichaelJordan

I'm a little bit confused by this. In order for this code to be more correct, then, should every instruction in the lock be atomic, meaning all 4 happen together without interruption? Or do we only need to do the load and compare atomically?

I think it would be the first because otherwise two threads could still read a 0 at different times and then both write 0.

planteurJMTLG

Should the third line be bnz R0, lock?

poptarts

@MichaelJordan Your first statement is correct. The data race occurred because underlying data was modified sometime after a processor read it and before it was able to write to it. Thus, the critical section can be thought of as the section beginning at the read and ending at the write. The compare happens to be in the middle of the critical section.

On the next slide, the ts instruction implements the read, compare, and write in a single atomic instruction, which solves this race.

apk

@planteurJMTLG, bnz just checks CC flags which the cmp sets, so no.

1_1

If value is 0, lock is available. If it is 1, it is held by someone else. We wait until it is a 0 (spin-lock). When it is 0, it writes a 1.

This read modify write sequence is not atomic, so if multiple threads read the value, they'll both see a 0 and then write to it and change to 1.