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anonymous

The difference between Load-Test-Store and the Test-and-Set is that the latter combines the test and set operations into an atomic operation. It will do 'all or nothing' operations for the lock variable, and thus avoid the situation that two or more processors will obtain the lock and update the variables in critical region.

chenh1

In effect, test-and-set instruction just set the memory location to be 1 and return the old value in that location. The whole process is atomic.

zckchange

It confuses me with 'mem[addr]', 'word', 'lock' interweaving together here. Can anyone help explain the diff among the three?

planteurJMTLG

Shouldn't the code for lock be the following, similar to the previous slide?

ts R0, mem[addr]

cmp R0, #0

bnz lock

holard

Is there a reason for not calling this instruction compare-and-swap (or vice versa)? Or is there some semantic difference between the two?

kayvonf

@holard. CAS(addr, a, b) compares the value in memory to a. Here, I defined test and set to only take an address. It compares that address to 0 and if the value is 0 it sets the address to 1. Therefore TS(addr) is the same as CAS(addr, 0, 1). (test and set is a simple special case of CAS).

Note compare and swap (CAS) is defined in a later slide.

vadtani

@planteurJMTLG 'bnz R0, lock' will jump to lock if R0 is not 0. So this will work as expected.