What does update rate % exactly stand for in this case?
This comment was marked helpful 0 times.
ycp
My best guess would be the percentage of memory writes that cause an invalidation/update when those programs are run.
This comment was marked helpful 0 times.
bwasti
@ycp is probably correct. This graph mainly shows that the update policy enforces a lot of traffic. In this case the traffic isn't necessary. The invalidate policy is a bit lazier, the only time a processor (or rather, a cache) does work is when it needs to. I think for the more general case this is probably preferable. As we can see, both AMD and Intel would probably say the same thing. I think generally this is true because parallel programming techniques would likely minimize the amount cache line sharing.
What does update rate % exactly stand for in this case?
This comment was marked helpful 0 times.
My best guess would be the percentage of memory writes that cause an invalidation/update when those programs are run.
This comment was marked helpful 0 times.
@ycp is probably correct. This graph mainly shows that the update policy enforces a lot of traffic. In this case the traffic isn't necessary. The invalidate policy is a bit lazier, the only time a processor (or rather, a cache) does work is when it needs to. I think for the more general case this is probably preferable. As we can see, both AMD and Intel would probably say the same thing. I think generally this is true because parallel programming techniques would likely minimize the amount cache line sharing.
This comment was marked helpful 0 times.