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ericwang

Am I understanding it correctly?

In MOESI, O state avoids flush when BusRd. Unless BusRdX happens, all BusRd requests will not change the state nor cause a flush. And PrRd will not change state O as well. But PrWr will change it back to M just like when it happens in state S.

ekr

Correct. As soon as another processor requests to read that data via BusRd, the processor in the M state switches to O, and services the cache miss (rather than flushing to memory and then having memory service the miss to the other processor). Any number of processors can request to read the data (via BusRd or PrRd), and each request will be serviced by whichever processor has the cache line in the O state.

As soon as PrWr is requested, it must change back to M, to indicate that the other processors may have a stale form of the data.

srw

Does anyone know if there are any pros/cons of MOESI vs MESIF? Apparently there's also a "MOSI". I just did a quick search, but I couldn't find any study comparing their performances.

It seems to me that for the most part, O and F accomplish the same thing, so maybe it's just a subtle implementation preference?

Faust

@srw This link may be helpful. It seems that MOESI is for AMD and MESIF is for Intel.

http://www.ece.umd.edu/~blj/CS-590.26/lectures/LectureH.pdf

zhanpenf

Is is possible to merge MESIF and MOESI to have something more efficient like "MOESIF"? I think the "forward" state in MESIF and the "owned" state in MOESI do not conflict with each other.

kk

I think MOESI just defers the flush to memory when you drop from M to O whereas MESIF still flushes to memory when you drop from M to F.

So yes, they don't seem to conflict with each other.