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andrewwuan

I was bit confused on why we need two steps, precharge & activation, in order to prepare a row for reading. After reading online I found that precharge is actually for the last row accessed. A precharge needs to be issued in order to deactivate the last line.

http://en.wikipedia.org/wiki/SDRAM_latency

http://www.hardwaresecrets.com/printpage/Understanding-RAM-Timings/26

meatie

Just curious: can the data pins move? From the picture above, it seems that in order to transfer the red part to the bus, the data pins will move left a little bit, align with the red part, and transfer the data.

Does DRAM work this way? How do the data pins transfer data to the bus?

aznshodan

@meatie The data pins don't move. What happens is it uses a mux to output the red portion of the Row Buffer. To know how mux works here's a link to wikipedia: http://en.wikipedia.org/wiki/Multiplexer

ak47

I assumed nothing involving main memory could have moving parts because ~5ms was the lower limit on the latency of precise mechanical motion. That's why it's the lower limit on hard disk access. Does someone with more expertise want to comment on this?

vrazdan

@ak47, there are no moving parts for main memory. it's true that hard disk drives have to deal with the rotating platters and the read head, but with ram (static or dynamic) and also SSDs there are no moving parts, just hardware.