Can anyone explain what BusUpg is? I looked back at the slides on the MESI protocol from lecture 10 and didn't see it.
MaxFlowMinCut
To summarize what is written on the slide that @dhua linked us to, BusUpg occurs when a processor changes state from Shared (S) to Modified (M). Though the MESI protocol diagram shows that it's a BusRdX request that's broadcasted, in reality the processor moving from S to M already has that line in its cache, so it doesn't really need to issue a "read" request for that line. Thus, BusUpg is more just a lightweight signal that a processor is moving from S to M, so as to let the other processors know that it's moving to the M state while avoiding the unnecessary overhead of issuing a read request.
kayvonf
Good question. I see how this is not clear.
BusUpg is movement from the S state to the M state in the MSI/MESI protocols. It is exactly like a BusRdX, but memory need not respond with data. (Since the cache already has the line, albeit in the wrong state.) This behavior is in contrast to that of to BusRdX which technically involves not only the line state change but memory or another cache responding with the data for the line.
To keep things simple we didn't clarify this distinction before. So the BusRdX transaction on the S to M transition on this MSI diagram or this MESI diagram can really by thought of as a "line upgrade". Data need not be provided, only the line state changed.
Can anyone explain what BusUpg is? I looked back at the slides on the MESI protocol from lecture 10 and didn't see it.
To summarize what is written on the slide that @dhua linked us to, BusUpg occurs when a processor changes state from Shared (S) to Modified (M). Though the MESI protocol diagram shows that it's a BusRdX request that's broadcasted, in reality the processor moving from S to M already has that line in its cache, so it doesn't really need to issue a "read" request for that line. Thus, BusUpg is more just a lightweight signal that a processor is moving from S to M, so as to let the other processors know that it's moving to the M state while avoiding the unnecessary overhead of issuing a read request.
Good question. I see how this is not clear.
BusUpgis movement from the S state to the M state in the MSI/MESI protocols. It is exactly like aBusRdX, but memory need not respond with data. (Since the cache already has the line, albeit in the wrong state.) This behavior is in contrast to that of toBusRdXwhich technically involves not only the line state change but memory or another cache responding with the data for the line.To keep things simple we didn't clarify this distinction before. So the
BusRdXtransaction on the S to M transition on this MSI diagram or this MESI diagram can really by thought of as a "line upgrade". Data need not be provided, only the line state changed.