FR-FCFS : If in the request queue there are requests for the current open row, you schedule them first, to reduce the overhead of repeated precharge. For other requests you follow first come, first serve.
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The memory controller is essentially a scheduler for the DRAM module. The scheduling algorithm that the controller uses to dispatch requests to the DRAM module is essential for achieving high performance. For example, if the row buffer currently contains row m and a slew of memory requests arrive in a pattern such that for any request k, k accesses row m and request k + 1 accesses row n, then to exploit the spatial locality offered by maintaining the row buffer present the memory controller should place all memory requests that access memory in that row first so that there is no overhead of having to precharge the lines, or select a row. However, this may be a double edged sword because if the requests that read from row m are all from one processor and the requests that read from row n are all from another processor, than this may lead to starvation and longer latency, and thus poor performance for that processor.
FR-FCFS : If in the request queue there are requests for the current open row, you schedule them first, to reduce the overhead of repeated precharge. For other requests you follow first come, first serve.
The memory controller is essentially a scheduler for the DRAM module. The scheduling algorithm that the controller uses to dispatch requests to the DRAM module is essential for achieving high performance. For example, if the row buffer currently contains row m and a slew of memory requests arrive in a pattern such that for any request k, k accesses row m and request k + 1 accesses row n, then to exploit the spatial locality offered by maintaining the row buffer present the memory controller should place all memory requests that access memory in that row first so that there is no overhead of having to precharge the lines, or select a row. However, this may be a double edged sword because if the requests that read from row m are all from one processor and the requests that read from row n are all from another processor, than this may lead to starvation and longer latency, and thus poor performance for that processor.